Dutch engineers make transistors with efficient piezoelectric material




Dutch engineers make transistors with efficient piezoelectric material

Researchers at the University of Twente have developed a method to make. Efficient transistors They enclose transistors with a piezoelectric material that can compress the silicon selectively.

For years, silicon compressed to improve performance: the mobility of electrons is increased in this “strained silicon, which increases the computing speed turn. However, the knife cuts both ways: when the transistor is not in use, it causes strained silicon leakage currents greater than uncompressed silicon. Two researchers of the MESA + Institute for Nanotechnology of the University of Twente, however, a way devised to compress. selective silicon

Transistor met piëzoëlektrische strain With their method, silicon can be pinched or compressed when the transistors are turned on to make. Better performance as possible When the transistors are turned off, however, the silicon is not compressed, so that the leakage currents are lower and the chips are therefore more economical. Tom van Hemert and Ray Hueting make use of piezoelectric material that changes shape when voltage is put.

By putting when the transistors switch voltage to the material they take advantage of the performance gains that enables strained silicon. Needed for the transistors voltage to ten times more to start conducting current was thereby reduced from 60mV to 50mV. When the transistors are turned off, it’s back to normal silicon and has lower leakage currents than strained silicon.


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